--- Log opened Tue Apr 01 00:00:28 2025
--- Day changed Tue Apr 01 2025
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2025-04-01T00:41:27 < karlp> fentyl:  svelte doesn't really help,  there's a bundling procedure that I can allegedly do for it as is,  but it's involved enough I'll do it later.
2025-04-01T00:41:30 < karlp> related though: https://github.com/BCsabaEngine/svelteesp32/pull/43
2025-04-01T00:42:42 < karlp> the ai code reivew comments there were interesting. better than I'd expected.
2025-04-01T00:48:01 < karlp> fentyl: svelte makes it streamlined to ahave it all together, but the "bundling" is pretty normal really.
2025-04-01T00:54:16 < fentyl> karlp: to me the point is that you don't have dynamic DOM or what is the name of the process of scanning the DOM for reactive elements and rewriting it on every page load
2025-04-01T00:54:33 < fentyl> bundling is minor part of the feat
2025-04-01T00:55:27 < fentyl> although I guess that due to the fact svelte can actually emit just the code that is actually used, it has positive impact on code size
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2025-04-01T13:24:43 < karlp> I don't give a rats arse about the mechanism it uses behind the scenes.
2025-04-01T13:52:40 < Steffanx> How grumpy is your day today karlp?
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2025-04-01T15:18:50 < jbo> don't worry, I am here for you
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2025-04-01T16:06:04 < Sadale> Hello. Someone posted in a local jobseeking telegram group looking for someone to work on a lidar project. They said that it's urgent. They said that it doesn't have to be full time employment. They're a company located in Hong Kong Science Park. I told him that I have connection with foreigners located outside Hong Kong and they still PM'd me so I presume that they're ok with non-local people mostly working remotely...? But I'm unable to obtain much info 
2025-04-01T16:06:05 < Sadale> from him. If interested, let me know that I'll arrange you to contact him.
2025-04-01T16:06:33 < Sadale> I guess that it's probably a startup because of their location.
2025-04-01T17:21:52 < Steffanx> Sounds like a job for you Sadale. You're a local, speak the language, perfect.
2025-04-01T17:22:40 < Sadale> Steffanx, me not interested. Many startups in Science Park die easily. If I were a contractor/freelancer it might be worth doing the job. But I'm a full time worker and I value company's stability.
2025-04-01T17:22:50 < Steffanx> If he's really desperate you can even make him pay as much those people on the other side of the ocean 
2025-04-01T17:26:20 < Sadale> Meh. I'm not being underpaid in whichever company I'm working for so I'm good. Plus I doubt that they'd be willing to pay that much for a full time worker. Those startups generally don't have much money to speak of.
2025-04-01T17:26:29 < Sadale> They might be able to pay more if it's per-job work tho.
2025-04-01T17:27:00 < Sadale> And no, I'm not gonna be a contractor any time soon. Too much work to build the network.
2025-04-01T17:27:40 < zyp> that's why I'm not a contractor
2025-04-01T17:28:00 < zyp> I like doing contract work, I don't like finding/negotiating contract work
2025-04-01T17:29:44 < Sadale> I don't like doing any kind of work that I'm paid to do ;_;
2025-04-01T17:29:57 < Sadale> Unfortunately I've got bills to pay so I still have to do that.
2025-04-01T17:30:01 < zyp> yeah, that's the main issue
2025-04-01T17:30:34 < Sadale> to be fair they have to pay someone to do that because the job is so terrible that no one would do that for free.
2025-04-01T17:32:47 < zyp> last time I did some sort of contract work, I just went and did it before negotiating with the client, and then told them «I'm done, this is the sort of stuff I do for fun anyway, so you can just pay me whatever you feel this is worth to you»
2025-04-01T17:34:00 < fentyl> it must certainly be scam, all work is done by AI these days
2025-04-01T17:34:57 < Sadale> I still don't think that AI is that capable these days. It works well for prototyping probably. Not so much for production.
2025-04-01T17:35:28 < Sadale> Probably pretty useful for hackathon or game jam or something, or cranking out some kind of MVP real quick.
2025-04-01T17:35:37 < zyp> I think much of AI is hype, but I'm seriously impressed by github copilot
2025-04-01T17:36:07 < zyp> I didn't care about it until they added the free tier, and then I figured «eh, might as well give it a try»
2025-04-01T17:36:27 < zyp> and by the time I used up the free tier allowance, I'd decided it was worth paying for
2025-04-01T17:36:49 < fentyl> I'll probably do the same as all the IDEs I've tried are somehow brokwn
2025-04-01T17:36:59 < fentyl> so... whatevs I can jump to code
2025-04-01T17:37:38 < Sadale> I still think that there gotta be another way to do it rather than using copilot or code autocompletion AI.
2025-04-01T17:38:12 < zyp> the thing I like about copilot is that I don't need to spend time dicking around with it, it just observes and makes completion suggestions
2025-04-01T17:38:29 < zyp> and at times it feels like a mind reader
2025-04-01T17:38:29 < Sadale> Usually I just manually doing copy and paste of the code from stackoverflow or example code that I found online. Then I start from there and adapt the code until it works for my use case.
2025-04-01T17:39:03 < Sadale> Also if it's an open source project, I wouldn't dare using AI for the code because I would have no idea on where the AI copied the code from.
2025-04-01T17:39:21 < Sadale> If it's commercial projects tho no one would know the code so there's no problem. :P
2025-04-01T17:40:40 < zyp> I was writing a PLL solver the other day, was looking at the algorithm and thought «oh, I need to add a check that this divisor is valid»
2025-04-01T17:41:16 < zyp> so I went to add a term to an if statement, wrote «and» and copilot suggested exactly what I intended to write: https://bin.jvnv.net/file/sjDtZ.png
2025-04-01T17:42:42 < jpa-> maybe soon we will have a local running equivalent
2025-04-01T17:43:39 < zyp> it's also pretty good at rewriting code
2025-04-01T17:44:41 < zyp> usually when I port code from one language to another, I copy the original into a comment in the file I'm working on so it's easy to reference while rewriting
2025-04-01T17:45:07 < zyp> and copilot picks up on what I'm doing, and what style I want it rewritten to
2025-04-01T17:46:07 < zyp> I've ported both C++ code to rust and migen code to amaranth that way
2025-04-01T17:47:19 < zyp> but anyway, the biggest thing is I don't need to dick around with it to make it do anything useful
2025-04-01T17:47:45 < zyp> unlike almost every other code completion stuff I've tried
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2025-04-01T17:55:27 < veverak> :D
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2025-04-01T18:17:52 < karlp> Steffanx: pretty fine really :)
2025-04-01T18:18:16 < karlp> I just _reallly_ don't have a strong opinion on how the js does it's thing behind the scenes. 
2025-04-01T18:21:22 < fentyl> right, that's pretty irrelevant
2025-04-01T18:21:39 < karlp> lol, company wide email "umm, who's using anaconda? please delete or report to your manager...."
2025-04-01T18:21:56 < fentyl> what pisses me off regularly is that no money can buy a CPU that won't hog for two seconds at blank screen until Angular or React will crunch beefy DOM and search for reactive elements in there
2025-04-01T18:23:47 < fentyl> at one occasion when a webshop did not load product image with JS disabled, I made the extra effort and measured how much loading time / traffic did the JS save. It turned on that the JS was some 3x larger than all the elements it was used to defer loading combined
2025-04-01T18:23:52 < fentyl> well done developer, well done
2025-04-01T18:28:12 < karlp> meh, added OPTIONS support to return allwoed methods,
2025-04-01T18:28:26 < karlp> and this fetch request is doing the put and failing before it does the OPTIONS pre-flight?!
2025-04-01T18:58:38 < qyx> is that anything wrong with conda in particular?
2025-04-01T18:58:46 < qyx> besides that I hate it for reasons unknown
2025-04-01T18:59:13 < karlp> they annouced that any org over 200 people now needed a commercial license.
2025-04-01T18:59:23 < qyx> lol
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2025-04-01T19:17:21 < jbo> conda... holy f didn't see that in a while
2025-04-01T19:19:46 < zyp> karlp, as an april fools, or what?
2025-04-01T19:21:43 < zyp> oh, no, old news
2025-04-01T19:22:44 < zyp> conda always seemed to me like «how to fuck up your python experience and be miserable», so I never paid it much attention
2025-04-01T19:23:36 < zyp> cadquery tried luring me into it a couple of years ago, but then they managed to publish it on pypi anyway
2025-04-01T19:31:15 < fentyl> is it the same as anaconda?
2025-04-01T19:31:26 < fentyl> that used to install fedora core back in 2000s?
2025-04-01T19:32:02 < zyp> I don't think so
2025-04-01T19:32:35 < fentyl> i have an appointment in 30 minutes with note: "M"
2025-04-01T19:32:37 < fentyl> and nothing else
2025-04-01T19:32:45 < zyp> AIUI it's a python packaging system that says «fuck the regular python packaging infrastructure, let's do it our own way instead»
2025-04-01T19:33:32 < zyp> and AIUI it began because the python packaging infrastructure at the time couldn't bundle binary dependencies or something
2025-04-01T19:33:38 < zyp> that's not an issue nowadays
2025-04-01T19:41:14 < fentyl> fucking automotive morons see the defacto impossibility of learning their tech stack without any paid training as an advantage
2025-04-01T19:41:17 < fentyl> let them burn
2025-04-01T19:47:19 < qyx> oh yes cadquery
2025-04-01T19:48:35 < zyp> cadquery/build123d is great
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2025-04-01T20:06:05 < bitmask> cursor is actually pretty nice
2025-04-01T20:08:56 < srk> Better Performance CadQuery scripts can build STL, STEP, AMF and 3MF faster than OpenSCAD.
2025-04-01T20:08:59 < srk> :))
2025-04-01T20:09:19 < srk> like on multiple cores faster!?
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2025-04-01T20:35:11 < Steffanx> openscad cant even build/export STEP
2025-04-01T20:35:41 < aandrew> wow really
2025-04-01T20:35:58 < aandrew> that seems like a pretty critical thing, exporting to step
2025-04-01T20:37:01 < Steffanx> The open sores way is openscad -> freecad -> step
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2025-04-01T20:41:22 < jpa-> and when you do that, you can't use the fancier openscad features
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2025-04-01T20:42:06 < jpa-> but in the end it is all just the same, cadquery uses cascade like freecad does
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2025-04-01T21:40:14 < zyp> jpa-, yeah, I just appreciate not having to learn a new language to use it
2025-04-01T21:40:41 < qyx> I trashed openscad
2025-04-01T21:41:06 < qyx> looks very cool on first sight and for simple objects
2025-04-01T21:45:09 < zyp> it's a question of what you're designing
2025-04-01T21:46:09 < zyp> if you're doing something with a bunch of weird shapes that's annoying to describe, designing it graphically is much faster
2025-04-01T21:47:09 < zyp> but for something parameterizable or that builds upon a bunch of input data, something like build123d is great
2025-04-01T21:47:58 < zyp> I did a bunch of test jig stuff in build123d
2025-04-01T21:49:57 < fentyl> I did both openscad and freecad and I like graphic modeling a tad bit more, just because I used to be a CAD SW developer, so I've been forced to work with this kind of software
2025-04-01T21:51:39 < zyp> I grabbed pcb hole and testpoint data from fabrication outputs and had build123d make drawings for both the pogo pcbs and the acrylic panels for the jigs
2025-04-01T21:51:53 < zyp> as well as a 3d render of how it'd look
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2025-04-01T21:54:49 < zyp> https://bin.jvnv.net/file/Ao4cs.png https://bin.jvnv.net/file/GGNRJ.png
2025-04-01T22:00:57 < jpa-> nowadays i just use freecad and manual edits, but i used to do automatic workflows like that and it's nice when you bother to do it
2025-04-01T22:01:44 < zyp> I'm tempted to do a fully 3d-printable testjig generator
2025-04-01T22:05:03 < zyp> and yeah, I've got a coworker that's recently been doing a bunch of simple jigs and stuff in freecad
2025-04-01T22:05:20 < zyp> not testjigs but like 6-pin programming jigs for small pcbs
2025-04-01T23:23:31 < qyx> I want a basic testjig
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2025-04-01T23:24:20 < qyx> also a basic X*Y switching matrix and some instruments
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2025-04-02T12:21:56 < karlp> zyp: yeah, I think my first experience with *conda was a cadquery thing, but agreed, thankfully it now "just works normally"
2025-04-02T12:37:51 < qyx> helo innovators
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2025-04-02T16:26:51 < Steffanx> 250 Hello qyx
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2025-04-02T16:52:38 < qyx> 403 nowai
2025-04-02T16:53:03 < qyx> also, I successfully abused CAN transceivers for UART comms
2025-04-02T16:53:42 < qyx> except that doing any serious UART on lunex is pain
2025-04-02T17:04:45 < karlp> relevant: https://github.com/hatlabs/kitfg
2025-04-02T17:04:54 < karlp> I've seen another one from a little while ago, not quite as new.
2025-04-02T17:05:14 < karlp> yeah, this one: https://tinylabs.io/openfixture/
2025-04-02T17:09:36 < srk> neato
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2025-04-02T17:51:18 < karlp> fuckin cors preflight bullshit
2025-04-02T18:17:47 < karlp> I accept the options, they send teh PUT, and then after further validation when they start sending me the file, I want to reject it, 4xx whatever, and firefox and chrome both just treat that as "suck it, CORS failed" and won't give me the response with the json rest reply in it.
2025-04-02T18:18:16 < karlp> I've added "allow-lol: *" header bullshit, just... allow it!
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2025-04-02T20:16:01 < bitmask> i hate my ISP
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2025-04-02T20:18:17 < Steffanx> I hate hate, bitmask 
2025-04-02T20:18:40 < bitmask> ok, I dislike my isp
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2025-04-02T20:25:46 < Steffanx> Whats the reason for this Mr bitmask ?
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2025-04-02T20:29:07 < fentyl> wadda wadda
2025-04-02T20:29:34 < fentyl> why the USB stack processes the request with no error and then stops processing further requests?
2025-04-02T20:46:04 < jpa-> it's had enough
2025-04-02T20:46:38 < fentyl> yeah, but there are other ways of expressing that
2025-04-02T20:47:04 < fentyl> it could strike, contact union and demand something, establish a political party... not just stop communicating
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2025-04-02T20:48:05 < qyx> it is ghosting you
2025-04-02T20:48:31 < qyx> the worst of all punishments
2025-04-02T20:49:07 < jpa-> i've tried to be a responsible adult lately and tell jbo that i'm busy instead of just ghosting
2025-04-02T20:49:25 < jpa-> maybe suggest to your USB stack that it does the same, says its busy
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2025-04-02T22:39:49 < jbo> mhm
2025-04-02T22:51:49 < Steffanx> Hm
2025-04-02T22:52:40 < Steffanx> I figured you're playing hard to get, jpa- 
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2025-04-03T02:30:24 < qyx> listening to italian metal trying to resolve hungarian freertos issues :S
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2025-04-03T08:12:24 < jpa-> heh, i read the ST mail first as "turkey gesture recognition" instead of "turnkey gesture recognition"
2025-04-03T08:12:28 < jpa-> that would have been something new
2025-04-03T08:14:31 < antto> can a turkey make the middle finger gesture?! o_O
2025-04-03T08:15:01 < antto> and can ST recognize it
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2025-04-03T08:45:59 < qyx> so where is ublox manufactured, who knows?
2025-04-03T08:47:54 < fentyl> china :>
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2025-04-03T11:41:21 < srk> haha https://www.analog.com/en/_/media/analog/en/evaluation-board-images/images/eval-adau1787z.png
2025-04-03T11:48:49 < zyp> what about it?
2025-04-03T11:49:41 < zyp> looks a bit «how many kinds of switches can we fit into this design?»
2025-04-03T11:53:17 < srk> and melt one!
2025-04-03T11:54:04 < srk> bottomleftmost fancy one
2025-04-03T11:54:55 < srk> looks like the first sigma dsp that can do more than 96khz
2025-04-03T12:01:24 -!- Livio [~livio@user/livio] has quit [Ping timeout: 264 seconds]
2025-04-03T12:12:46 < jpa-> meh, what is going on.. openocd "profile 1 foobar.dat" creates foobar.dat, but the contents are mostly just 0
2025-04-03T12:12:57 < jpa-> mdw 0xE000101c   shows that PCSR is working ok
2025-04-03T12:13:33 < jpa-> but.. then also gprof is bullshitting me, when i run  "gprof firmware.elf foobar.dat"  it gives random functions from the file
2025-04-03T12:16:58 < jpa-> hmm, specifying address range seems to help
2025-04-03T12:20:11 < jpa-> seems that without range, it picks a silly large bucket size and then the address is only reported with 1kB accuracy or something
2025-04-03T12:25:32 < zyp> that's PC sampling over SWD?
2025-04-03T12:27:06 < zyp> it just does equal size buckets? not something more clever like break it down along symbol boundaries like orbtop?
2025-04-03T12:38:13 < jpa-> seems so
2025-04-03T12:38:22 < jpa-> i think that's the gprof format
2025-04-03T12:38:46 < jbo> good morning
2025-04-03T12:38:56 < jpa-> i wish rp2350 had swo.. or more pins so that i could use the 4-bit trace port
2025-04-03T12:40:27 < zyp> doesn't it support 1-bit sync trace?
2025-04-03T12:40:39 < zyp> (two pins are easier to spare than five)
2025-04-03T12:42:02 < jpa-> might be worth checking
2025-04-03T12:42:35 < zyp> I've never seen a target that supports 4-bit, but not 2-bit or 1-bit
2025-04-03T12:55:56 < qyx> I am imagining myself as a CEO of a small company with 10 employees
2025-04-03T12:56:07 < zyp> and you're all 10?
2025-04-03T12:56:16 < qyx> and a box full of lexaurin on my right-hand shelf under the desk
2025-04-03T12:56:22 < qyx> *in
2025-04-03T12:56:55 < jbo> qyx, literally jbo
2025-04-03T12:57:16 < qyx> I am genuinely drained, half of the brain is missing
2025-04-03T13:09:55 < qyx> I write an email, a phone call follows 5 minutes after that "oh you just emailed me asking.. " YES OMG you can hit the REPLY button
2025-04-03T13:10:25 < qyx> unrelated, I estimated delivering a thing by the end of the work week
2025-04-03T13:10:26 < jbo> I found that people like to do that if they want to avoid a paper trail
2025-04-03T13:11:07 < qyx> a customer calls asking if I really deliver on friday
2025-04-03T13:23:09 < Steffanx> Fuck sending 10 emails for something that can be solved with a 1 minute call. Or when there is some time pressure.
2025-04-03T13:24:45 < Steffanx> Just make the call and send a confirmation email when decisions have been made for the paper trail.
2025-04-03T13:25:26 < Steffanx> *Confirmation/summary/whatever
2025-04-03T13:27:38 < Steffanx> Clients can't read anyway..
2025-04-03T13:29:43 < qyx> no, phone call introduces burden to the work flow
2025-04-03T13:30:08 < qyx> I don't need immediate answer and I definitely can write an email much faster than calling someone
2025-04-03T13:52:08 < Steffanx> Time for a personal assistant qyx
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--- Day changed Fri Apr 04 2025
2025-04-04T00:28:20 < qyx> when I am not adding a 10pin cortex debug connector to the next board because of space reasons, tell me I am dumb
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2025-04-04T00:57:54 < zyp> so, what are you adding?
2025-04-04T00:58:20 < qyx> test pads
2025-04-04T00:59:55 < zyp> you know, if you laid out those test pads in a particular pattern, you could get an off the shelf cable to connect to them
2025-04-04T00:59:58 < zyp> https://bin.jvnv.net/file/NjEyT.JPG
2025-04-04T01:00:59 < qyx> no.
2025-04-04T01:02:16 < zyp> enjoy making a custom jig then :)
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2025-04-04T07:28:07 < jpa-> qyx: been there, done that; it is not that bad
2025-04-04T07:28:27 < jpa-> especially if you can make the test pads small THTs (like 0.3mm drill and no soldermask), then sensepeeks will stay in place nicely
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2025-04-04T13:31:37 < tomeaton17> hello
2025-04-04T13:53:27 < Steffanx> Hello Mr Eaton. Long time no see
2025-04-04T13:54:15 < Steffanx> Did you kill your British comrade Laurenceb in the mean time? Haven't seen him for a while either 
2025-04-04T13:58:49 < tomeaton17> Steffanx I suspect he got taken for reeducation by Starmer's secret police judging by his views
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2025-04-04T14:02:16 < qyx> so I have a python opening a tun device
2025-04-04T14:02:34 < qyx> and I correctly send udp packets over that device, I can see them coming out using tcpdump
2025-04-04T14:03:00 < qyx> but when I bind a udp socket to a port and tun device address, I can not receive any data
2025-04-04T14:03:06 < qyx> both with python and socat
2025-04-04T14:03:11 < qyx> whats wrong
2025-04-04T14:08:55 < zyp> tried binding to 0.0.0.0?
2025-04-04T14:09:38 < qyx> udp        0      0 :::52000                :::*                                
2025-04-04T14:10:32 < zyp> tried sending to the right addr?
2025-04-04T14:10:33 < qyx> also
2025-04-04T14:10:34 < qyx> udp        0      0 fd00:dead:beef::1:52000 :::*                                
2025-04-04T14:11:02 < qyx> 11:10:55.385095 IP6 fd00:dead:beef::10.52001 > fd00:dead:beef::1.52000: UDP, length 4
2025-04-04T14:11:08 < qyx> (from tcpdump)
2025-04-04T14:12:09 < qyx> I probably tried everything
2025-04-04T14:17:05 < zyp> what does `ip addr` on the tun interface say?
2025-04-04T14:17:59 < qyx> 6: nbus: <POINTOPOINT,MULTICAST,NOARP,UP,LOWER_UP> mtu 1500 qdisc pfifo_fast state UNKNOWN group default qlen 500 link/none inet6 fd00:dead:beef::1/96 scope global 
2025-04-04T14:18:23 < qyx> https://paste.jvnv.net/view/yJsOc
2025-04-04T14:18:23 < zyp> got any active firewall rules?
2025-04-04T14:19:28 < qyx> that's an interesting question, I have set everything to accept
2025-04-04T14:44:56 < qyx> I have flushed it, didn't help
2025-04-04T14:55:30 < qyx> oh
2025-04-04T14:55:31 < qyx> 11:54:40.230036 IP6 (hlim 64, next-header UDP (17) payload length: 12) fd00:dead:beef::10.52001 > fd00:dead:beef::1.52000: [bad udp cksum 0x0000 -> 0x6f7f!] UDP, length 4
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2025-04-04T15:47:02 < qyx> yeah bad udb checksum was the cause
2025-04-04T15:47:28 < qyx> interesting that icmp works with bad checksum but udp doesn't
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2025-04-04T23:37:11 < karlp> icmp checksum is app level, not transport level?
2025-04-04T23:37:30 < karlp> but yeah, that sounds pretty rough day.
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2025-04-04T23:37:50 < bitmask> what a week
2025-04-04T23:37:53 < bitmask> hows it going
2025-04-04T23:38:37 < karlp> great, sun's still out, clear skies, beer, summerhouse.
2025-04-04T23:38:48 < bitmask> woot woot
2025-04-04T23:39:31 < qyx> those viking places
2025-04-04T23:39:42 < qyx> karlp: and -5°C?
2025-04-04T23:40:30 < qyx> oh sorry +5 :P
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--- Day changed Sat Apr 05 2025
2025-04-05T00:36:28 < karlp> I thik it was maybe 9 today?
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2025-04-05T22:34:45 < Steffanx> yes
2025-04-05T22:55:18 < jbo> thank you
2025-04-05T23:14:32 < Steffanx> You welcome jbo
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2025-04-05T23:54:08 < qyx> hello weekend innovators
--- Day changed Sun Apr 06 2025
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2025-04-06T01:45:16 < qyx> ok stlink v3-mini actually *needs* VCC sense connected
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2025-04-06T03:36:47 < zyp> common for anything with voltage buffers
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2025-04-07T23:46:30 < PhantomWork> question guys, I basically have a loop of rx tx, and on the receiver it is basically "wait for data then transmit data" loop.  On main: HAL_IRDA_Receive(&hirda3, (uint8_t *) rxData, 2, 100); <=== I think this is where my issue is, it stop receiving, I have a theory that it might have dropped a byte, then it is now offset by one?  i.e. does it
2025-04-07T23:46:30 < PhantomWork> keep the received byte in buffer even if it timed out? So when the slave transmit the 2 bytes it receive one, issue a "rx complete" and buffer the second?
2025-04-07T23:56:17 < fentyl> this depends on part, but the RX registers are often double-buffered. So the peripheral can receive new data before the old one is received, but you have to read the buffer before new data is entirely received otherwise the second byte is lost
2025-04-07T23:56:30 < fentyl> that should be signalled by RX overflow or something similar
2025-04-07T23:57:56 < PhantomWork> my actual issue is a loss of data, the master fail to receive data after a while, the slave still transmit, so... I think it might be that 2 bytes receive thing... and since my usb-serial fried (new are comming) I can't read the debug data :/
2025-04-07T23:59:15 < PhantomWork> anyway will see tomorrow
--- Day changed Tue Apr 08 2025
2025-04-08T00:07:41 < qyx> check the fifo mode if your firmware is not fast enough
2025-04-08T00:08:01 < qyx> some uart implementations have 8 byte fifos iirc
2025-04-08T00:08:23 < qyx> also you definitely need to make your protocol resistant to these kind of errors
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2025-04-08T15:00:42 < qyx> port.c:349:75: warning: result of '2^24' is 26; did you mean '1 << 24' (16777216)? [-Wxor-used-as-pow]
2025-04-08T15:00:46 < qyx> lold irl
2025-04-08T15:00:55 < qyx> of course I did
2025-04-08T15:01:54 < zyp> :D
2025-04-08T15:02:56 < zyp> nice to see compilers warning about them now, I've caught those in code review before
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2025-04-09T02:31:09 < qyx> [3535701.723404] rtw_8821cu 1-1.3:1.2 wlxe0e1a9387cff: renamed from wlan0
2025-04-09T02:31:21 < qyx> well done, that's exactly the name a human likes
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2025-04-09T10:29:58 < qyx> this humanity is solving printing the modern way for the past 30 years and still fails hard
2025-04-09T10:30:23 < qyx> yes if my pdf is white with black text, I want the text to appear black on the white paper, not black on a black background
2025-04-09T10:30:57 < qyx> yes, if I select black/white mode, I indeed doesn't want to use any of the color toner cartridges
2025-04-09T10:31:36 < qyx> yes if I select A4 for the first tray, please, keep this setting, no, I am not changing paper size in the tray with every fucking sheet of paper
2025-04-09T10:32:23 < qyx> and yes, if I select I want to print on labels, I indeed do want this, don't ask it *locally* on a networked printer
2025-04-09T10:32:30 < qyx> 30 fucking years, unbelievable
2025-04-09T10:32:47 < qyx> not even mentioning it takes half a day to properly install drivers
2025-04-09T10:33:03 < qyx> in the year of 2025 when the printing api should be generic and open
2025-04-09T10:34:20 < qyx> where on earth is this civilization heading to when driver install is easier in linux than in windows or doesn't work in windows at all
2025-04-09T10:37:21 < jpa-> in 10 years 3d printers have gone from fiddly crap to "it just works".. in 50 years 2d printers have gone from "it works with our own system" to "it doesn't work with any system"
2025-04-09T10:39:06 < jpa-> in 170 years 1D printers have gone from fiddly crap to "it doesn't exist anymore"
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2025-04-09T12:33:18  * karlp is failing to imagine what 1d printers are
2025-04-09T12:34:39 < BrainDamage> they extrude wire
2025-04-09T12:35:18 < BrainDamage> (I am not serious, and I doubt neither jpa- is)
2025-04-09T12:40:14 < jpa-> http://www.samhallas.co.uk/telhist1/telehist2.htm
2025-04-09T12:43:35 < jpa-> https://ids.si.edu/ids/deliveryService?id=NMAH-2006-10282   it even has triple redundancy in the lines!
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2025-04-09T14:38:43 < tomeaton17> .bef
2025-04-09T14:38:53 < tomeaton17> sorry accident
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2025-04-09T15:43:10 < jbo> jpa- always serious <3
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2025-04-09T18:40:27 < Steffanx> How serious is the jbo?
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2025-04-09T18:49:03 < PhantomWork> Hi there, question. I have 2 µC, a master and a slave, using IRDA @115200.     Master transmit 3 bytes, slave receive it all the time (validated by checksum), slave process it then transmit 2 bytes back. The master receive it for a while, then... I get some HAL_TIMEOUT error...    anyone have an idea what could be the issue?     about
2025-04-09T18:49:04 < PhantomWork> 400 "ping pong" per second, then when it fail it wait 100ms, and never recover... so, no idea what could be the issue...
2025-04-09T18:55:57 < zyp> shitty APIs and/or shitty API usage
2025-04-09T18:57:26 < zyp> irda sounds like something where you have to expect errors, so you'll want to have robust error recovery
2025-04-09T19:00:30 < fentyl> PhantomWork: HAL_TIMEOUT for reading the IrDA? Didn't you just lost a byte due to interference?
2025-04-09T19:02:03 < PhantomWork> fentyl: it is not just a single byte, it work fine for minutes at a time, then 100% break
2025-04-09T19:02:39 < PhantomWork> slave still receive, master fail to receive. I don't have a scope but a simple led on master Rx show activity, so the slave does transmit.
2025-04-09T19:03:26 < PhantomWork> it is as if the master become deaf...
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2025-04-09T19:03:42 < fentyl> it's hard to tell what's wrong if I don't know which API you used exactly
2025-04-09T19:04:20 < PhantomWork> my protocol should be robust:    while(1) {transmit, receive}        slave is: while(1) { receive, transmit}
2025-04-09T19:05:22 < PhantomWork> so a missing byte shouln't cause a full drop
2025-04-09T19:05:58 < PhantomWork> let me pastebin a simplified code...
2025-04-09T19:08:22 < qyx> PhantomWork: do you have RXNE interrupt enabled?
2025-04-09T19:08:40 < qyx> on the master
2025-04-09T19:12:58 < PhantomWork> https://paste.debian.net/hidden/c34a79c8/
2025-04-09T19:13:07 < PhantomWork> it is all pooled, and not enabled
2025-04-09T19:16:29 < qyx> isn't ISR->ORF set?
2025-04-09T19:19:43 < PhantomWork> I think I confirmed the issue just now... it seems like it buffer one byte, but not always
2025-04-09T19:21:01 < PhantomWork> so it missed one byte, and now buffer the second, return a timeout yet keep that byte, then receive the second "first" byte in the next receive...   which CRC fail, and buffer the second byte...
2025-04-09T19:21:24 < PhantomWork> my earlier tests show that it wasn't doing that... so... meh...  gonna try to find a way to fix it
2025-04-09T19:21:26 < qyx> yes you lost the framing
2025-04-09T19:21:40 < qyx> there are many ways to fail like this
2025-04-09T19:21:50 < qyx> you have to handle it
2025-04-09T19:22:29 < PhantomWork> 0377 Rx data: 0x003b 0x0100      <==== 2 9 bits bytes, 9th bytes indicate the frame start...    the 9th is set on the second byte, not first...
2025-04-09T19:22:41 < PhantomWork> ow well, I'll do something like the slave does instead...
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2025-04-09T19:25:29 < fentyl> ideally run the same stuff at both ends and share the code
2025-04-09T19:25:42 < fentyl> you have to fix only once not twice
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2025-04-09T21:02:53 < jpa-> haha, if i have been complaining about Aisler PCBA, now i finally get to complain about JLCPCB
2025-04-09T21:03:34 < jpa-> they had a random SMD resistor stuck below a chip, lifting one side off the board
2025-04-09T21:06:31 < zyp> I got a capacitor under a crystal from a local place once
2025-04-09T21:06:47 < zyp> and another board in the same series with the crystal upside down
2025-04-09T21:08:19 < nohit> are you guys gonna buy lumen pnp ?
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2025-04-09T21:09:04 < nohit> its only $2000
2025-04-09T21:09:50 < zyp> it's also only a p&p machine
2025-04-09T21:10:41 < nohit> yeah, you need also a solder paste printer
2025-04-09T21:10:51 < nohit> and reflow oven
2025-04-09T21:10:51 < zyp> and a reflow oven
2025-04-09T21:10:58 < nohit> which is already have
2025-04-09T21:11:01 < nohit> *i
2025-04-09T21:11:12 < zyp> and time to operate and maintain everything
2025-04-09T21:12:20 < zyp> having a p&p is one of those «it'd be fun, but it makes more financial sense to just outsource the service» things
2025-04-09T21:12:31 < qyx> no, I don't do series
2025-04-09T21:12:58 < qyx> and usually do special stuff and I don't have components on reels
2025-04-09T21:14:20 < zyp> if you were doing large enough volumes to justify a p&p, you could probably justify a better p&p than that
2025-04-09T21:14:37 < nohit> im considering a dedicated lab, it would only cost ~170e per month here, from an old industrial area
2025-04-09T21:15:44 < zyp> so, what's your use for a lumenpnp?
2025-04-09T21:16:18 < nohit> no use for it yet
2025-04-09T21:17:13 < zyp> I expect that if I attempted setting up my own assembly house, any potential savings vs outsourced assembly would be lost in yield issues
2025-04-09T21:17:45 < zyp> both scrapped parts and wasted time
2025-04-09T21:18:32 < zyp> I figure you need quite a high volume to get the process dialled well enough in that yield is not a significant problem
2025-04-09T21:19:10 < zyp> so I think I'll leave assembly to companies that's already there :)
2025-04-09T21:21:08 < jpa-> even loading up the feeders sounds like enough work that it doesn't make sense for protos.. and i don't want to be a factory worker doing series production
2025-04-09T21:22:38 < zyp> I'd probably rather load feeders than hand place components :)
2025-04-09T21:23:53 < zyp> but it's easier to just get protos assembled too
2025-04-09T21:24:19 < nohit> is it ?
2025-04-09T21:24:27 < nohit> i have always assembled my own boards
2025-04-09T21:24:33 < zyp> last I ordered a stencil for assembling a board myself, I ended up paying more for stencil+shipping than having jlcpcb do the assembly would have cost me
2025-04-09T21:24:56 < nohit> yes but what if JLCPCB dont have the components you need ?
2025-04-09T21:25:17 < zyp> the only reason I didn't do the latter is because it was a simple board with few parts, and jlcpcb didn't have one of the parts in stock and I didn't want to wait for them to get it
2025-04-09T21:25:54 < zyp> and then assembling it myself was an absolutely miserable experience :)
2025-04-09T21:26:12 < nohit> iirc you can send own parts to PCBWay but that sounds like a hassle
2025-04-09T21:26:22 < nohit> JLCPCB do not accept them
2025-04-09T21:26:38 < zyp> my reflow oven managed to slightly melt the connectors while not fully reflowing the solder
2025-04-09T21:26:44 < zyp> so I had to rework everything afterwards
2025-04-09T21:27:01 < zyp> yes, they do
2025-04-09T21:27:07 < nohit> i always solder by hand, i havent even tested my reflow oven yet
2025-04-09T21:27:22 < zyp> and jlcpcb can also get parts from digikey/mouser/etc…
2025-04-09T21:27:35 < nohit> but with next boards im gonna order a stencil and test it
2025-04-09T21:28:10 < zyp> I often do stuff you can't hand solder :)
2025-04-09T21:28:11 < nohit> they can ? i thought if they are not in lcsc then youre out of luck
2025-04-09T21:28:28 < zyp> used to be like that
2025-04-09T21:28:30 < nohit> everything can be hand-sodlered
2025-04-09T21:30:40 < zyp> I'm not counting reflowing with hotair as hand-soldering
2025-04-09T21:31:01 < fentyl> after 20 something years I finally taught myself to solder at least half-properly
2025-04-09T21:31:02 < zyp> and you're certainly not doing a BGA with an iron :)
2025-04-09T21:31:10 < fentyl> so I might enjoy soldering a board or two
2025-04-09T21:32:04 < zyp> fentyl, I do enough rework to scratch that itch, I don't need to assemble boards from scratch as well :)
2025-04-09T21:33:27 < fentyl> zyp: its basically just to tick the mark - I did solder SMD parts back when I've no longer been young nor pretty
2025-04-09T21:33:47 < fentyl> last thing I soldered was THT board
2025-04-09T21:33:54 < fentyl> I fucked even that up :>
2025-04-09T21:48:47 < nohit> the prices are much higher thru this global sourcing service than directly from mouser/digikey
2025-04-09T21:49:04 < Steffanx> how is it possible to fuck that up fentyl ?
2025-04-09T21:49:11 < zyp> yep
2025-04-09T21:50:30 < fentyl> Steffanx: shitty iron, shitty solder, shitty obsolete flux and holes one size too large
2025-04-09T21:50:48 < fentyl> also I made the board myself at home
2025-04-09T21:51:08 < fentyl> with something like expired photoresist
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2025-04-09T22:26:00 < Steffanx> oh shitty tools so shitty job..
2025-04-09T22:38:03 < fentyl> yeah, I am no hardware guy so I used whatever that was available
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2025-04-09T23:33:22 < karlp> nohit: now you'r ejust moving the goalposts :)  things you buy from global sourcing also get shipped once and end up in "your" warehouse, so youcan order more than need now to get a better price.
2025-04-09T23:33:30 < karlp> you can also resell them to other people.
2025-04-09T23:33:41 < karlp> but you _can_ get ~anything assembled by them now.
2025-04-09T23:35:40 < nohit> how am i moving goal posts ? i just noticed that the priced are extremely high via global sourcing
2025-04-09T23:41:11 < karlp> just felt like,"oh, cant' use that, it doesn'thave all the parts" "it has the parts" "oh, can't use that, it's too expensive"
2025-04-09T23:42:00 < karlp> I certainly will try and use eastern parts instead of "global sourcing" but it's very much an option
2025-04-09T23:47:30 < zyp> I usually end up with a mix of jlc and global sourcing parts
2025-04-09T23:47:51 < zyp> just depends what's cheaper/available
2025-04-09T23:48:07 < karlp> it's all still better letting them assemble than me :)
2025-04-09T23:48:24 < zyp> haven't tried sending them stuff yet, but I'll probably try that at some point too
2025-04-09T23:49:01 < karlp> back at old job we had digikey drop ship to nextpcb for some modems that nextpcb couldn't source for us.
2025-04-09T23:49:04 < zyp> and yeah, for low volume stuff the low NRE costs outweighs the BOM markup easily
2025-04-09T23:49:14 < karlp> was not super cheap, but proto pricing baby
2025-04-09T23:57:45 < zyp> I ran a 50-board series at jlcpcb for work once
2025-04-09T23:59:03 < zyp> IIRC it came out at less than half the price of another quote we got, even with the markup on the BOM
--- Day changed Thu Apr 10 2025
2025-04-10T00:42:05 < qyx> ok I failed today, I overslept my most productive part of the day
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2025-04-10T01:04:11 < qyx> so what's the actual state of trumps tarrifs?
2025-04-10T01:04:20 < qyx> *tariffs
2025-04-10T01:05:20 < zyp> depends if you're asking about yesterday, today or tomorrow, it changes every day :)
2025-04-10T01:06:57 < qyx> https://www.politico.eu/article/eu-tariffs-trade-war-donald-trump-republican-states/
2025-04-10T01:07:03 < qyx> haha I laff
2025-04-10T01:07:12 < qyx> the reasoning is exceptional
2025-04-10T01:07:39 < qyx> Let’s start with the EU’s No. 1 target — soybeans, the most valuable item on the bloc’s hit list, a product whose economic and symbolic significance for the Republican Party's heartlands cannot be overstated
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2025-04-10T01:08:42 < qyx> I guess it will most probably hit TI, ADI, etc stuff too?
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2025-04-10T11:19:42 < qyx> Due to the use of epoxy glue for lid sealing, hermeticity of the package is not guaranteed. Processing or use of
2025-04-10T11:19:45 < qyx> this package in a harsh environment should be assessed by the customer.
2025-04-10T11:19:45 < qyx> wwhat
2025-04-10T11:22:06 < jpa-> there was an attempt
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2025-04-10T11:44:47 < qyx> I always though numpy+matplotlib is for lamers and pros use matlab/octave
2025-04-10T11:45:21 < qyx> now I see numpy+matplotlib much more powerful
2025-04-10T11:46:41 < jpa-> i hate matplotlib, but i hate octave's plot system too
2025-04-10T11:46:57 < qyx> I hate both
2025-04-10T11:47:01 < zyp> haha
2025-04-10T11:47:39 < qyx> if I made a proper and usable interactive matplotlib gui, I would be loving it
2025-04-10T11:47:53 < qyx> mostly
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2025-04-10T11:53:55 < zyp> tried https://nicegui.io/documentation/section_data_elements#pyplot_context ?
2025-04-10T11:56:47 < qyx> doesn't look proper
2025-04-10T11:57:00 < qyx> just some fancy plotly clone
2025-04-10T11:57:06 < zyp> idk
2025-04-10T11:57:10 < zyp> there's also bokeh
2025-04-10T11:57:15 < qyx> I mean a Qt app
2025-04-10T11:58:24 < zyp> hmm, I should have some bokeh stuff around somewhere
2025-04-10T11:59:54 < qyx> also jupyter, I am not yet decided whether I should try it
2025-04-10T12:00:16 < zyp> oh, yeah, I made this stuff to show ethernet packet timings: https://bin.jvnv.net/file/zJzZ0/pcapgraph.html
2025-04-10T12:01:36 < qyx> yeah it has nicer icons than matplotlib's default but otherwise the functionality is the same
2025-04-10T12:02:01 < qyx> one of the features I used the most in octave was ctrl+c
2025-04-10T12:02:07 < qyx> and paste into a document
2025-04-10T12:02:33 < zyp> the nice thing about bokeh is that you get a standalone html file that's browsable
2025-04-10T12:02:47 < zyp> e.g. you can zoom around in that pcapgraph thing
2025-04-10T12:02:48 < qyx> yeah pyplot/dash does the same
2025-04-10T12:02:55 < qyx> sorry plotly
2025-04-10T12:03:07 < zyp> ah
2025-04-10T12:03:26 < qyx> https://plotly.com/examples/
2025-04-10T12:05:03 < BrainDamage> jupyter is just a fancy ipython wrapper
2025-04-10T12:06:15 < BrainDamage> I guess what you want is something like origin (commercial), and its clones
2025-04-10T12:06:22 < BrainDamage> iirc there's veusz
2025-04-10T12:07:06 < jpa-> i hate the gui plotter that karlp uses too
2025-04-10T12:07:10 < jpa-> gnuplot is the only one i like
2025-04-10T12:08:06 < qyx> BrainDamage: I just want a matplotlib gui, that's all
2025-04-10T12:08:37 < qyx> I want to "browse" the graph as a 2025 person, proper zooming, panning, etc.
2025-04-10T12:08:45 < qyx> measure on the graph
2025-04-10T12:08:52 < qyx> take snapshots
2025-04-10T12:09:04 < qyx> get point corrdinates in a sane way (that is, not rewriting it by hand)
2025-04-10T12:09:19 < qyx> etc.
2025-04-10T12:09:30 < qyx> nothing really fancy, just a usable gui on top of matplotlib
2025-04-10T12:09:33 < BrainDamage> sounds like you're more annoyed by the output widget window then
2025-04-10T12:10:11 < qyx> if I want to present the data in a paper, it is ok, I generaet a svg and insert it
2025-04-10T12:10:23 < qyx> but I want to tweak the graph beforehand, look at it properly
2025-04-10T12:10:32 < qyx> maybe change grids, ticks, axis limits
2025-04-10T12:10:35 < qyx> interactivel
2025-04-10T12:10:44 < qyx> and not by rewriting the python source and running again
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2025-04-10T12:12:12 < tomeaton17> origin is nice but not free
2025-04-10T12:13:41 < jpa-> gnuplot does most of the zooming, panning measure etc. stuff but you have to press weird keys to do it
2025-04-10T12:14:30 < BrainDamage> fwiw the qt output backend for matplotlib youcan do zoom, pan, etc, but not sectioning the graph or output coordinates to a file
2025-04-10T12:14:40 < jpa-> but yeah, i would really like python to have some sensible output widget for the stuff, and preferrably one that works well in jupyter *and* that works in jupyter after you save and reload
2025-04-10T12:14:58 < BrainDamage> you can extend it, but that means doing ui programming
2025-04-10T12:15:23 < BrainDamage> same for the js output widget, mutatis mutandis
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2025-04-10T12:31:36 < tomeaton17> Any altium enjoyers?
2025-04-10T12:32:06 < zyp> yeah?
2025-04-10T12:33:07  * qyx @ steff metal
2025-04-10T12:35:08 < tomeaton17> Is there still no way to get an outjob to zip up the gerbers and drills for you? having to use chinese fab house and they don't accept woke odb++
2025-04-10T12:36:03 < zyp> «still»? haven't that been possible since forever?
2025-04-10T12:36:04 < Steffanx> Uh what qyx?
2025-04-10T12:38:32 < qyx> that's a good quality nordic metal which Steffanx surely wouldn't like
2025-04-10T12:38:44 < qyx> https://www.youtube.com/watch?v=4UMwLxFNKS0
2025-04-10T12:41:05 < tomeaton17> zyp where?
2025-04-10T12:42:29 < zyp> pretty sure my recent outjobs generate zips, but I don't have them available at the moment
2025-04-10T12:43:53 < tomeaton17> zyp alright, I cant see an option for that in the gerber settings
2025-04-10T12:45:22 < zyp> look at the target settings for the whole job, around where you select which dir to put the results in
2025-04-10T12:47:26 < tomeaton17> do you mean the output container?
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2025-04-10T13:29:28 < qyx> who on earth designs SPI protocol with a r/w bit at the beginning
2025-04-10T13:32:20 < jpa-> i often use a command byte at beginning and the topmost bit of the command byte as read/write
2025-04-10T13:39:40 < zyp> yeah, that's common
2025-04-10T13:40:25 < zyp> first byte out is r/w and register addr and first byte in is status flags
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2025-04-10T14:37:57 < qyx> so, my accel generates data at about 208 Hz and has no way to synchronize
2025-04-10T14:38:07 < qyx> so I am reading the data register precisely at 200 Hz
2025-04-10T14:38:13 < qyx> what distortion could I expect?
2025-04-10T14:41:21 < zyp> which accel is this?
2025-04-10T14:41:45 < qyx> iis2iclx
2025-04-10T14:42:01 < qyx> the more pro accel, the less sync features
2025-04-10T14:42:16 < qyx> I am getting some 250€ ones and they have nothing
2025-04-10T14:42:50 < zyp> what do you mean, datasheet says FIFO on front page, I assume that means you can check how many samples are in the FIFO
2025-04-10T14:43:15 < qyx> that not what sampling sync is
2025-04-10T14:43:29 < qyx> it has a free running internal oscillator
2025-04-10T14:43:38 < qyx> and no means of syncing it to an external clock
2025-04-10T14:43:47 < qyx> so the sampling freq is arbitrary
2025-04-10T14:44:08 < qyx> yes I have fifo and drdy interrupt, but that doesn't help me if I have 3 such misbehaving sensors
2025-04-10T14:45:36 < zyp> yeah, sure, but «the sample clock is not locked to my processing clock» is not the same problem as «I'm reading the data register and I don't know if the value I got is a repeat of the previous, the next sample, or two samples after the previous»
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2025-04-10T14:48:06 < jpa-> you could do a fancy resampling filter
2025-04-10T14:48:27 < qyx> zyp: how would that help
2025-04-10T14:48:36 < qyx> yeah either resampling or it simply doesn't matter
2025-04-10T14:48:40 < zyp> how would what help?
2025-04-10T14:49:24 < qyx> knowing if I missed a sample because the sensor clock is <200 Hz (causing a previous one to be duplicated) or if it is overwritten twice (clock > 200 Hz)
2025-04-10T14:50:25 < zyp> well, if you're using the FIFO, you're not losing any data
2025-04-10T14:51:15 < qyx> yes I know but then again, what to do with missing/surplus samples?
2025-04-10T14:51:20 < qyx> I still need to  process them
2025-04-10T14:51:24 < qyx> that's not the question
2025-04-10T14:51:45 < zyp> you could do a fancy resampling filter
2025-04-10T14:51:53 < qyx> the question is if skipping/copying samples to resample introduces distortion
2025-04-10T14:52:03 < qyx> or I need a fancy resampling filter instead
2025-04-10T14:52:16 < zyp> the answer is yes, the question is whether it's negligible or not
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2025-04-10T14:56:53 < qyx> or better, do I care
2025-04-10T14:57:09 < qyx> let's numpy it
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2025-04-10T14:59:27 < zyp> that's what negligible means
2025-04-10T15:03:14 < qyx> also, it is much easier to read the data register directly if possible in realtime to timestamp the result than to reinvent methods to sync samples from the fifo with a timestamping timer
2025-04-10T15:03:48 < qyx> the MCUs only responsibility is to read sensors so I can schedule reasing properly and deterministically
2025-04-10T15:07:24 < jpa-> https://jpa.kapsi.fi/stuff/pix/qyx_decimation.png   i tried to simulate it, seems like not much effect at low frequencies, then some spikes if the signal frequency is exact multiple of the difference between the two samplerates
2025-04-10T15:13:20 < qyx> oh my AI friend jpa- 
2025-04-10T15:14:15 < jpa-> oops, i think the drop-off is actually a bug in code, updated image and the decimation has even less effect
2025-04-10T15:16:44 < qyx> I expected much more
2025-04-10T15:16:49 < jpa-> the exact value of the spikes depends on how the frequencies land, but it seems it is max   10 * log10(208/200) dB
2025-04-10T15:16:50 < qyx> but was lazy to find out
2025-04-10T15:16:57 < jpa-> there is probably some nice mathematical reason for that
2025-04-10T15:17:36 < qyx> 10*log?
2025-04-10T15:18:05 < jpa-> yeah, even though i have 20 * log for the conversion
2025-04-10T15:18:10 < jpa-> seems half it
2025-04-10T15:30:21 < jpa-> looks like it is actually better to decimate 208 -> 200 Hz than 416 -> 200 Hz, even if you sum together the extra samples in the latter case
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2025-04-10T15:39:00 < PhantomWork> Hi there again, same issue as yesterday. But scarier. So I did some minor modification to the code that should have made things better, it got worse, way worse. Then I added more debug code AFTER the problematic section, and... the problem is "gone". anyone have some tricks to debug this kind of issue?
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2025-04-10T15:40:01 < PhantomWork> context: IRDA communication where the master stop receiving data and get HAL_TIMEOUT ....
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2025-04-10T15:45:39 < jpa-> could be timing issue, could be random memory corruption
2025-04-10T15:45:48 < jpa-> (by random, i mean you have messed up some pointer)
2025-04-10T15:46:13 < jpa-> look at the registers instead of "HAL_TIMEOUT" nonsense
2025-04-10T15:47:26 < qyx> jpa-: actually i am decimating then again from 200 to 5 Hz
2025-04-10T15:47:55 < jpa-> hopefully with a reasonable resampler
2025-04-10T15:48:24 < jpa-> because just skipping samples to go from 200 to 5 Hz is asking for huge aliasing
2025-04-10T15:48:41 < qyx> averaging them
2025-04-10T15:48:59 < jpa-> just per sample?
2025-04-10T15:49:07 < jpa-> still gives pretty bad aliasing
2025-04-10T15:49:26 < jpa-> you could do CIC filter directly from the 208 Hz then, if you don't mind the droop towards 2.5 Hz
2025-04-10T15:51:48 < PhantomWork> jpa-: random memory corruption is my prime suspect, this code use DMA for the PWM for neopixels
2025-04-10T15:52:57 < PhantomWork> I suspect that the issue is due to that, but no idea how to debug, confirm and even less fix it
2025-04-10T15:54:52 < tomeaton17> Anyone used converge for part sourcing?
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2025-04-10T15:59:44 < jpa-> PhantomWork: use debugger to see what has gone wrong
2025-04-10T16:00:07 < jpa-> can't really give anything more than that, but you know how things should be and something is not like it should be..
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2025-04-10T17:45:34 < PhantomWork> jpa-: re: debugger.... well, right now the problem dissapeared by adding more debug code... so... it's a pain...
2025-04-10T17:46:32 < PhantomWork> do you know what happen if you modify a DMA memory while it is being "DMAed" to the PWM hardware? My undestanding is that it may output the wrong pwm, but that's it, no corruption...
2025-04-10T17:47:08 < jpa-> correct
2025-04-10T17:47:28 < jpa-> word accesses are atomic, so in general case it won't even output wrong values
2025-04-10T17:47:54 < jpa-> but if your problem is sensitive to adding code elsewhere in the program, you should avoid doing that while debugging
2025-04-10T17:48:20 < jpa-> instead use gdb to inspect the register states after you have some apparent problem (like the timeout) and work your way back to see what has caused it
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2025-04-10T17:49:05 < jpa-> you may want to check for stack usage also, e.g. fill the stack on start and see how far it has been used
2025-04-10T17:49:35 < PhantomWork> the stack is what I think happen
2025-04-10T17:49:52 < PhantomWork> I have some printf, I think that one may use quite some ram...
2025-04-10T17:50:09 < PhantomWork> plus, I have a 280 words array, so might be full...
2025-04-10T17:50:51 < jpa-> you could make the array static or global to try things out (also if you run DMA with a stack array, better not leave the scope before DMA is done..)
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2025-04-10T17:52:07 < PhantomWork> led PWM is global, but not volatile, aka uint16_t LED_PWM_Data[(24*MAX_LED)+280] = { 0 };      is that fine?
2025-04-10T17:52:33 < jpa-> well, at least it is not on stack
2025-04-10T17:54:43 < srk> what chip is that?
2025-04-10T17:55:19 < PhantomWork> looking at the code, 8 bytes is allocated in main, 1 in each 3 functions... so really nothing much in term of variable..
2025-04-10T17:55:23 < PhantomWork> stm32f103
2025-04-10T17:56:00 < jpa-> printf does use a lot of stack, but checking stack usage is pretty simple so why not just do it
2025-04-10T17:56:29 < jpa-> fill the few words at bottom of the stack with 0xDEADBEEF and in gdb check if they are still intact
2025-04-10T17:57:00 < PhantomWork> do you have a guide on how to do so?
2025-04-10T17:57:19 < jpa-> nah, but google probably does; it's quite basic stuff
2025-04-10T17:58:18 < jpa-> do you have gdb working?
2025-04-10T17:58:39 < srk> I would suspect caches but on F1.. proly not
2025-04-10T17:58:40 < PhantomWork> I have stm32cubeide only
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2025-04-10T20:17:18 < PhantomWork> on AVR you have an atomic block(restore_state), is there a direct equivalent in stm32?
2025-04-10T20:19:06 < nohit> no
2025-04-10T20:21:08 < PhantomWork> sad. then I can just blindly disable and enable irq   and no side effects beside possibly missing the second of same irq right?
2025-04-10T20:24:18 < nohit> i do not know your spesific case
2025-04-10T20:26:02 < PhantomWork> avoiding a possible race condition between a function call and an interrupt
2025-04-10T20:26:24 < PhantomWork> ow well, will do some tests see ya
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2025-04-10T20:30:38 < zyp> nohit, what, of course there is
2025-04-10T20:31:56 < zyp> but what it's called depends on what library you're using
2025-04-10T20:31:57 < nohit> that is arv-gcc spesific thing, i doubt arm gcc has a thing like that
2025-04-10T20:32:11 < nohit> or avr-libc rather
2025-04-10T20:32:27 < fentyl> its nothing more than a fancy wrap around enable / disable interrupts anyway
2025-04-10T20:33:08 < zyp> yep
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2025-04-10T20:35:33 < fentyl> and I doubt an interrupt would be missed due to interrupts disabled
2025-04-10T20:35:52 < zyp> in my library, they're C++ RAII, and store restore_state internally, I have implementations for both cortex-m and risc-v: https://github.com/zyp/laks/blob/main/interrupt/critical_section.h
2025-04-10T20:36:45 < fentyl> I do that by the means of transactions
2025-04-10T20:36:55 < fentyl> so the period where interrupts are disabled are short
2025-04-10T20:36:59 < fentyl> but there are gotchas
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2025-04-10T20:37:25 < zyp> RAII is the way to go if you've working with a reasonably modern language
2025-04-10T20:38:10 < zyp> if you want the period to be short, you just make the scope as small as possible
2025-04-10T20:38:13 < fentyl> sure, the problem here wasn't resource ownership or something derived from it. the problem here was that in certain cases you can't afford critical section at all
2025-04-10T20:38:43 < zyp> sure, critical sections are the crowbar approach
2025-04-10T20:38:58 < zyp> you can do much more fine grained stuff with atomics
2025-04-10T20:39:12 < fentyl> like this: the scheduler in my RTOS is a rather rudimentary piece of code and takes long time to calculate next scheduled thread
2025-04-10T20:39:27 < fentyl> aaaand it can be called from interrupts as a side-effect of sending a notification
2025-04-10T20:40:23 < fentyl> if I put this slow routine into critical section, potential IRQ latency would be long, several hundred cycles at best and that would increase with increasing number of threads running in the system
2025-04-10T20:40:53 < fentyl> if I don't put it into critical section, interrupt may happen while kernel is in scheduler, it can call scheduler and corrupt scheduler state
2025-04-10T20:41:40 < fentyl> the way how this is solved is by "transacting" access to scheduler data structures
2025-04-10T20:42:42 < fentyl> reading these structures can be performed in parallel, otherwise unconstrained. you just need to start a transaction before you do so. once you figure out what you want to write, you "commit" the transaction.
2025-04-10T20:43:04 < fentyl> if commit passes, you know that nobody modified these structures since you started your transaction and you have exclusive write access
2025-04-10T20:43:33 < fentyl> if it fails, someone committed a transaction between your transaction start and attempt to commit it
2025-04-10T20:44:04 < fentyl> it is then context dependent what happens if your transaction commit fails
2025-04-10T20:44:46 < fentyl> scheduler will simply give up as only interrupt that called sched_yield could cause the transaction to abort
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2025-04-11T15:45:17 < karlp> I'mquite pleased with my binary RTT implementation: https://github.com/karlp/zypsnips/blob/master/rtt-binary-csv.py
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2025-04-11T15:51:43 < Steffanx> It's a kind of magic
2025-04-11T15:53:53 < karlp> but now I get alllll my samplesfor plotting :)
2025-04-11T15:53:58 < karlp> so I'm winning at least.
2025-04-11T15:54:06 < karlp> fighting back against this shitbox m0
2025-04-11T16:15:26 < zyp> hmm, maybe should add a rtt transport to smolt
2025-04-11T16:16:43 < zyp> karlp, are you doing C++?
2025-04-11T16:18:14 < karlp> no.
2025-04-11T16:18:24 < karlp> zyp: I was thinking of your smolt stuff when I did this.
2025-04-11T16:18:44 < karlp> like, it's super hardcoded, which is simple, but it's so obviously ripe for automation like your smolt stuff
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2025-04-11T17:39:12 < zyp> you nerdsniped me, walked the baby for an hour while thinking about smolt
2025-04-11T17:39:38 < karlp>  i didn't do shit :) I was just showing off somethign I was somewhat proud of doing :)
2025-04-11T17:39:56 < karlp> you brought up smolt yourself ;)
2025-04-11T17:40:14 < zyp> fair enough; your stuff made me nerdsnipe myself :)
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2025-04-11T17:45:58 < zyp> how does RTT work, AIUi it has channels; are they just bytestreams?
2025-04-11T17:46:53 < zyp> smolt is designed to take advantage of sideband stuff for framing, so it needs more than just a bytestream
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2025-04-11T17:53:39 < karlp> yeah, you get a buffer with a read/write pointer,
2025-04-11T17:53:51 < karlp> so when you come back to re-read it, you can see how much you need to fetch, 
2025-04-11T17:53:59 < karlp> and it's on you to come back often enough not to wrap.
2025-04-11T17:54:02 < karlp> ~ish.
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2025-04-11T18:19:52 < zyp> smolt has a ringbuffer transport, but currently it's only designed for after-the-fact readout from gdb
2025-04-11T18:20:08 < zyp> but I was thinking about how to do a live one while I walked
2025-04-11T18:21:59 < zyp> since it's all pluggable, for cases where direct blocking output is too slow, it could also output into a buffer, and then have an idle task that feeds from the buffer to one of the other transports, e.g. ITM
2025-04-11T18:22:59 < zyp> it could be useful e.g. when doing event tracing during OS task switches
2025-04-11T18:23:23 < zyp> I've thought about extending smolt with tracing functionality
2025-04-11T18:23:58 < zyp> could use all the same infrastructure, just without log text attached to the tags
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